As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have resulted in the development of three-dimensional designs, such as a multi-gate field effect transistor (FET) including a fin FET (FinFET). As devices become smaller and corresponding electrical contact area shrinks, contact resistance increases, and device performance is impacted. It is desirable to reduce contact resistance and improve electron flow in semiconductor devices.